Safe I/O

The invention relates to a diagnostic device for checking the I/O logic or cell of a microchip for errors (SEU) and defects. The error detection is carried out permanently by innovative integrated digital architectures and monitors digital I/O units  in real time, thus eliminating the need for time-consuming and error-prone software solutions. The patent-pending solution can be integrated into any digital chip design, regardless of the technology.

• Real-time error detection

• Hardware solution without diagnostic software routines

• Real-time diagnostics even for communication signals (SPI, I²C, UART, etc.) without interrupting or influencing communication

• Monitor digital I/O without software intervention

• Use multiplex-capable I/O in safety-relevant applications

• Self-diagnostic logic, minimal space consumption, easily scalable for 2:1 / 3:1 / N:1 multiplexing of digital I/Os

• Technology-independent implementation directly in VHDL / Verilog

• Digital microchips / microcontrollers
• Safety-related microchips  in accordance with ISO 26262 / IEC 61508
• Improve FPGA solutions (including existing ones)
• Save chip area and multiplex more functions

via e-mail to Mrs. Hentschel