List of topics

On this page, all student theses should be created in short form (title, previous knowledge, supervisor) and then linked to the pages open theses, ongoing theses, completed theses. If the status changes, the entry can be adjusted (editor, coded submission date (xxyy=month/year)). New works are added at the top.

If available, a more detailed description is entered on the topic description page, which can also be linked to. This page still needs to be made visible...

Ultrasonic direction and distance measurement for autonomous systems (robots)
C++; Available immediately; Supervisor: Martin Kumm

Implementation of a method for power minimization in parallel multipliers
C++; Available immediately; Supervisor: Martin Kumm

Development of a web interface for a VHDL code generator
PHP; Available immediately; Supervisor: Martin Kumm

Implementation of place&route algorithms for FPGA design as part of the ACT project
C/C++, FPGA knowledge; Available immediately; Contact: Martin Kumm

Design and implementation of an FPGA simulation model in an HDL
VHDL or Verilog; Available immediately; Contact: Peter Zipf

Realization of a video downlink via WLAN under Raspberry Pi or Arduino
Linux, C/C++; Available immediately; Supervisor: Peter Zipf

Realization of runtime reconfigurable combinatorial functions on FPGAs
C++; Available immediately; Supervisor: Martin Kumm

iOS app for displaying or entering simple circuit diagrams
Objective-C, iOS; Available immediately; Supervisor: Peter Zipf

Construction and commissioning of a Raspberry Pi with FPGA module as a quadrocopter controller
Linux, C/C++, some hardware experience; available immediately; contact person: Peter Zipf

VHDL  Low-level implementationof adder trees on Altera FPGAs
VHDL; Available immediately; Supervisor: Martin Kumm

Selection of the implementation variant (HW or SW) for the partial functionalities of the quadrocopter flight attitude control (HW/SW codesign)
C/C++; Available immediately; Supervisor: Peter Zipf

Design and optimization of an FPGA model for application-specific area optimization (VHDL or Verilog)
VHDL or Verilog, FPGA knowledge; Available immediately; Supervisor: Peter Zipf

Construction of a lightning detection station for the lightning detection network blitzortung.org
Hardware procurement and construction, commissioning; to be awarded immediately; Supervisor: Konrad Möller

Application of high-level synthesis algorithms to Matlab/Simulink models to optimize hardware requirements
Matlab/Simulink, C/C++; Available immediately; Supervisor: Konrad Möller

Investigations into automatic VHDL code generation with the Matlab HDL Coder
VHDL; Matlab Simulink; Available immediately; Supervisor: Konrad Möller

Measurement and evaluation of the power dissipation of runtime reconfigurable circuits
VHDL; Hardware setup; Available immediately; Supervisor: Konrad Möller

Design and construction of a bat detector
VHDL/FPGAs, electronic setups or DSP programming; Available immediately; Supervisor: Martin Kumm

Mapping of task graphs on manycore architectures
C or Java; Available immediately; Supervisor: Peter Zipf

Development of a circuit board for FPGA-accelerated control of a quadrocopter
Eagle, Linux, C/C++; Master's thesis; Supervisor: Jürgen Baumann; Supervisor: Martin Kumm

Software for the generation of task graphs for the evaluation of task mapping algorithms for manycore architectures
C++; Available immediately; Supervisor: Peter Zipf

Development of a position holding/drift detection system consisting of several combined optical sensors (e.g. optical flow)
Hardware setup+VHDL; Available immediately; Contact: Peter Zipf

Planning and construction of an active optical landing system (laser projection synchronized with camera for residual height detection)
Hardware construction + microcontroller programming; available immediately; contact: Peter Zipf

Development of an application for localization in buildings
iOS; Supervisors: Lionel Wagner, Sascha Lütkemeier; Supervisor: Martin Kumm

Development of a method for optimizing reconfigurable constant multiplications
C/C++; Author: Marco Kleinlein; Supervisors: Konrad Möller, Martin Kumm

Optimization of pipelined adder graphs with 3-input adders
C/C++; Author: Martin Hardieck; Supervisor: Martin Kumm

Analysis of Partial reconfiguration in Xilinx FPGAs
Measurement setup or VHDL; Available immediately; Supervisor: Konrad Möller

Android app in the teaching/learning software project
Java, Android programming; Available immediately; Supervisor: Peter Zipf

iOS: ToDo list with cloud synchronization (iPhone; preferably + desktop and possibly + iPad)
Available immediately (possibly for a team of 2); Supervisor: Peter Zipf

Application of high-level synthesis algorithms to Matlab/Simulink models to optimize hardware requirements
Matlab/Simulink, C/C++; Available immediately; Supervisor: Konrad Möller

iOS app for learning the relationship between KV diagrams, value tables and Boolean equations in digital logic
Objective-C, iOS; Available immediately; Supervisor: Peter Zipf

"Application for the input and simulation of state machines on a tablet PC"
Edited by: Daniel Kawaletz (Bachelor thesis)

"Creation of a VHDL code generator of adder graphs with fine granular pipelining"
Edited by: Thorsten Löbig ()

"Efficient VHDL implementation of an adder with three inputs for Xilinx FPGAs"
Edited by: Jens Willkomm (Bachelor thesis)

"Design and implementation of a timer module for tablet computers in the Objective-C programming language"
Edited by: Andreas Dinkel (Bachelor thesis)

"Extension of the RPAG algorithm to support adders with three inputs"
Edited by: Martin Hardiek ()