Computer architecture

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Lecture

The exam review "Computer Architecture" will take place on 10/18/2018 from 10:00 am to 12:00 pm in seminar room 1105 (next to RA secretary's office).

Learning Objectives

Information representation, structure and operation of computer architectures, arithmetic units, control units, models of different computer architectures.   

Contents:
Internal hardware structure of processors and architectures.

Prerequisites:
Digital technology, basics of programming, basics of mathematics.

Course number: FB16-6800 

Time and place:
Tuesdays, 2:00 p.m. - 4:00 p.m., room 0446

Start: 17.04.2018

Instructor:

Scope:
4 SWS or 6 CP

Written Exam:

Exercise

Place and time:
Thursdays, 14:00 - 16:00, Room 1603

Start:
The date of the first exercise will be announced in the lecture.

Exercise supervisor:

Contact:
Email to the secretary's office

Exercise sheets

Bibliography:

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Bell, C. G.; Newell, A.: Computer Structures: Readings and Examples. Mc Graw-Hill, 1971

Ben-Ari: Fundamentals of Parallel Programming. Munich Hanser Verlag, 1984

Bermond, R.: Transputer. Informatik-Spektrum 9

Bernstein, H.: Highly integrated digital circuits and microprocessors. Munich: Richard Pflaum Verlag, 1978

Bleden, K.: Digitale Rechner. Vorlesungsscript Fachhochschule Darmstadt, 1984

Bode, A.: Microarchitectures and Microprogramming: Formal Description and Optimization. Berlin, Heidelberg, New York, Tokio: Informatik Fachberichte Nr.82, Springer Verlag, 1984

Bode, A.; Händler, W.: Rechnerarchitektur - Teil 1: Grundlagen und Verfahren. Berlin, Heidelberg, New York, Tokyo: Springer Verlag, 1980

Bode, A.; Händler, W.: Rechnerarchitektur - Teil 2: Strukturen. Berlin, Heidelberg, New York, Tokyo: Springer Verlag, 1983

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